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| Architecture of digital systems, builds from NAND gates to CPUs |
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Full Adder
Using basic AND, OR, and XOR gates, we can create the logic for one-bit addtion.
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Comparator
Similarly, we can build a comparator. This one is a four-bit greater-than structure.
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Arithmetic Logic Unit
Combining an adder, comparator, and a bit shifter, you can create an Arithmetic Logic Unit (ALU). ALU's are a core component of
CPU's, as they can perform arbitrary addition, subtraction, and logic operations. This is a 32 bit ALU.
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CPU
We can create a simple RISC-V CPU that consists of 5 stages: Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Write Back (WB).
The execute stage uses the ALU from above. This basic single-cycle CPU- it does not have pipelining or optimization. Later in the semester, we optimized our CPUs for throughput with pipelining, branch prediction, and other techniques.
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